The present invention relates to the electrical, electronic and computer arts, and, more particularly, to methods for forming field effect transistors in integrated circuits.
The inclusion of strained channels in modern metal-oxide-semiconductor field effect transistor (MOSFET) devices holds the promise of increased charge carrier mobilities and transistor device currents. Unfortunately, however, electron mobility and hole mobility benefit from different strain characteristics. The performance of an n-type field effect transistor (NFET) is typically improved if its channel is tensily strained. In contrast, the performance of a p-type field effect transistor (PFET) is typically improved if its channel is compressively strained. These opposite responses to different types of strain have made strain engineering in complementary metal-oxide-semiconductor (CMOS) processing quite challenging.